Computer Science & Engineering

Faculty Details

Bibhash Sen Associate Professor
Joined the Institute in 2008
bsen[dot]cse[at]nitdgp[dot]ac[dot]in
Publication

90

Publications

7

Sponsored Projects

0

Consultancy Projects
Education

10

Doctoral Students

0

Continuing Education

10

PG Dissertation
Education
  • PhD. in Engineering (Computer Science and Engineering)
    Indian Institute of Engineering Science and Technology (IIEST), Shibpur, India.
  •  M.E., Computer Science & Engineering 
    Bengal Engineering and Science University (BESU), Shibpur, India.
  •  B.Tech., Computer Science & Engineering 
    North Eastern Regional Institute of Science and Technology (NERIST), India.

Work Experiences

Total: 13 years of teaching experience and 1-year industry experience (as on 01.01.2019)

  • Associate Professor (2018 - continue)                                                                                                                    Department of Computer Science and Engineering, National Institute of Technology, Durgapur, West Bengal, India.

  • Assistant Professor (2008 - 2018)                                                                                                                            Department of Computer Science and Engineering, National Institute of Technology, Durgapur, West Bengal, India.

  • Programmer Analyst (2007–2008)
    Cognizant Technology Solution Pvt. Ltd, Kolkata, West Bengal, India.

  • Lecturer (Contractual) (2003-2005)
    School of Information Technology, Tripura University, Agartala, Tripura, India.

  • Lecturer (Contractual) (2002–2003)
    Dept of Computer Science and Engineering, TEC (NIT Agartala), Tripura, India.

Research Interest
  1. Hardware Security.
  2. Cognitive Science.
  3. Hardware Trojan Detection and Prevention
  4. Secure Architecture for IoT application
  5. Embedded System & its application in medical science
  6. Quantum-dot Cellular Automata (QCA), Reversible Logic and Fault-Tolerant Architecture

Projects
Title Investigator Co-investigator Sponsered Agency Duration Status

Neurocomputing and Cognitive Intelligence- Developing a model for Analysing the Learning Disabilities of Dyslexic Child. Year of starting: 2020

 Dr. Bibhash Sen (PI) Prof. Suchismita Roy (Co-PI) MeitY, Govt. of India 3 years Ongoing

Design of lightweight and cost-effective PUF-Enabled secure architecture for authentication. Year of starting: 2018

 Dr. Bibhash Sen (PI) Prof. Suchismita Roy Department of Science & Technology Government of West Bengal 3 years Completed

ADKit: Smartphone Based Artificial Intelligence Enabled Portable Low-cost Anemia Detection Kit based on Observation of Nail and Palm Pallor. Year: 2018

 Dr. Mamata Dalui (PI) Dr. Bibhash Sen (Co-PI) MeitY 3 years Completed

Secure Architecture for FPGA based IoT Applications with enhanced physical unclonable function. Year: 2018

 Dr. Bibhash Sen (PI) Prof. Suchismita Roy DST-SERB (Core Research/ EMR scheme) 3 years Completed

Modernization of VLSI Laboratory (Infrastructure)

 Prof. Suchismita Roy (Coordinator) Dr. Bibhash Sen (Co-coordinator) DST-FIST, Govt. of India 3 years Completed
A Study on Hardware Security and its Challenges Dr. Bibhash Sen (PI) - RIG-III, NIT Durgapur 3 years Completed

 

Teachings

 

Subject Name Subject Code Semester Degree Download Key
software engineering cs603 6 UG
  

 

CS-302 Digital Logic Design
CS-502 Theory of Computation
CS-504 Microcontroller based Systems
CS-710 Cryptography & Network Security

 

 

 

 

CS-402 Computer Org. and Arch.
CS-604 Software Engineering
CS-652 Software Engineering Lab

 M. Tech:

CS-1003 Software Design and Validation
CS-1052 Software Engineering Lab
CS-9029 Embedded Systems

 

 

UG / PG Students

Anshu S Anand

Anshu S Anand

Assistant Professor, IIIT Allahabad
Reactor Control Division Bhabha Atomic Research Centre, Mumbai
Anshu S Anand

Anshu S Anand

Assistant Professor, IIIT Allahabad
Reactor Control Division Bhabha Atomic Research Centre, Mumbai
Manojit Dutta

Manojit Dutta

Technology Consultant, Danske Bank
QCA. Received Best  B. Tech Project Award from TCS
Manojit Dutta

Manojit Dutta

Technology Consultant, Danske Bank
QCA. Received Best  B. Tech Project Award from TCS
Mayukh Roy Chowdhury

Mayukh Roy Chowdhury

Ph.D. Scholar in Texas A&M University, USA
Mayukh Roy Chowdhury

Mayukh Roy Chowdhury

Ph.D. Scholar in Texas A&M University, USA
Divyam Saran

Divyam Saran

Working in Facebook, UK. MS in CSE at Saarland University, Germany
Got Best B. Tech Project Award from TCS
Divyam Saran

Divyam Saran

Working in Facebook, UK. MS in CSE at Saarland University, Germany
Got Best B. Tech Project Award from TCS
Manoj Mohapatra

Manoj Mohapatra

Working in Microsoft. Completed MBA in XLRI
Worked in QCA Technology
Manoj Mohapatra

Manoj Mohapatra

Working in Microsoft. Completed MBA in XLRI
Worked in QCA Technology
Archisman Ghosh

Archisman Ghosh

Pursuing PhD, Pennsylvania State University
Hardware Security
Archisman Ghosh

Archisman Ghosh

Pursuing PhD, Pennsylvania State University
Hardware Security
Aritra Bagchi

Aritra Bagchi

Pursuing a Ph.D. at CSE Department IIT Delhi
Aritra Bagchi

Aritra Bagchi

Pursuing a Ph.D. at CSE Department IIT Delhi
Binayak Ranjan Das

Binayak Ranjan Das

Masters Student of Fall Computer Science State University Of New York, Stony Brook
Binayak Ranjan Das

Binayak Ranjan Das

Masters Student of Fall Computer Science State University Of New York, Stony Brook
Snehasish Sen

Snehasish Sen

MS in Texas A&M University in the department of Computer Science.
Snehasish Sen

Snehasish Sen

MS in Texas A&M University in the department of Computer Science.
Anirban Nag

Anirban Nag

Completed Ph.D. at School of Computing University of Utah, USA
Anirban Nag

Anirban Nag

Completed Ph.D. at School of Computing University of Utah, USA
Kumar Mohit

Kumar Mohit

Working in Zurich, Completed M.S in Computer Science ETH Zurich, Switzerland
Kumar Mohit

Kumar Mohit

Working in Zurich, Completed M.S in Computer Science ETH Zurich, Switzerland
Anik Sengupta

Anik Sengupta

Working in Tweeter, worked in Microsoft Research Engineer
Anik Sengupta

Anik Sengupta

Working in Tweeter, worked in Microsoft Research Engineer
Samik Some

Samik Some

Ph.D. Scholar in IIT Kanpur
Samik Some

Samik Some

Ph.D. Scholar in IIT Kanpur
Asmit De

Asmit De

Working in Intel, USA
Asmit De

Asmit De

Working in Intel, USA
Saurabh Koar

Saurabh Koar

Systems Software Engineer, Apple
Saurabh Koar

Saurabh Koar

Systems Software Engineer, Apple
Rajdeep K Nath

Rajdeep K Nath

Perusing Post Doc in Finland, PhD from Kentucky University, USA
Worked in QCA for B Tech Project.
Rajdeep K Nath

Rajdeep K Nath

Perusing Post Doc in Finland, PhD from Kentucky University, USA
Worked in QCA for B Tech Project.

Doctoral Students

Mahabub Hasan Mahalat

Mahabub Hasan Mahalat

Awarded
PUF: Hardware Security
Design & Analysis of Light Weight Physically Unclonable Function (PUF) Targeting Cost-Effective Hardware Security
Mahabub Hasan Mahalat

Mahabub Hasan Mahalat

Awarded
PUF: Hardware Security
Design & Analysis of Light Weight Physically Unclonable Function (PUF) Targeting Cost-Effective Hardware Security
Sourav Roy

Sourav Roy

Full Time Ph.D. Scholar (Ongoing)
IoT Security
Development of Lightweight Security Systems for Resource-constrained Devices: A Hardware Security Approach
Sourav Roy

Sourav Roy

Full Time Ph.D. Scholar (Ongoing)
IoT Security
Development of Lightweight Security Systems for Resource-constrained Devices: A Hardware Security Approach
Amit Pramanik

Amit Pramanik

Part time PhD scholar (Thesis Submitted)
QCA
Synthesis of Efficient Reliable QCA Logic Circuit under Regular Clocking Scheme
Amit Pramanik

Amit Pramanik

Part time PhD scholar (Thesis Submitted)
QCA
Synthesis of Efficient Reliable QCA Logic Circuit under Regular Clocking Scheme
Anindan Mondal

Anindan Mondal

Awarded
Hardware Trojan
Hardware Trojan: Analysis of attacks and detection in the context of Hardware Security
Anindan Mondal

Anindan Mondal

Awarded
Hardware Trojan
Hardware Trojan: Analysis of attacks and detection in the context of Hardware Security
Sandip Charkaborty

Sandip Charkaborty

Part Time PhD Scholar (Ongoing)
Hardware Trojan
Study of different soft computing approach to detect Hardware Trojans
Sandip Charkaborty

Sandip Charkaborty

Part Time PhD Scholar (Ongoing)
Hardware Trojan
Study of different soft computing approach to detect Hardware Trojans
Durgesh Lohar

Durgesh Lohar

Full Time PhD Scholar (Ongoing)
Cognitive Science & its application
Feasibility Study and Design of Gesture Based Aid for Effective HCI: A Cognitive Load Perspective
Durgesh Lohar

Durgesh Lohar

Full Time PhD Scholar (Ongoing)
Cognitive Science & its application
Feasibility Study and Design of Gesture Based Aid for Effective HCI: A Cognitive Load Perspective
Sukla Banik

Sukla Banik

Awarded
VLSI Testing
FPGA Interconnect Resource Testing
Sukla Banik

Sukla Banik

Awarded
VLSI Testing
FPGA Interconnect Resource Testing
Surajit Dutta

Surajit Dutta

Full Time Ph.D Scholar
Neurocomputing & Cognitive Intelligence
Surajit Dutta

Surajit Dutta

Full Time Ph.D Scholar
Neurocomputing & Cognitive Intelligence
Aranyk Banerjee

Aranyk Banerjee

Full time research Scholars (BEAT)
Cognitive Science and bio-medical Signal processing
Aranyk Banerjee

Aranyk Banerjee

Full time research Scholars (BEAT)
Cognitive Science and bio-medical Signal processing
Mrinal Goswami

Mrinal Goswami

Awarded
(Visvesvaraya PhD Scheme, 2016) Joined in: 2016 AoW: Quantum-dot cellular automata
Mrinal Goswami

Mrinal Goswami

Awarded
(Visvesvaraya PhD Scheme, 2016) Joined in: 2016 AoW: Quantum-dot cellular automata

Projects

Sl.No. Title Name of the PI Name of the CoPIs Funding Agency Amount (Rs.) Project Type Project Status Date of Initiation Date of Completion
1 Cognitive load assessment methods for the blind, in adaptation to new assistive technologies Bibhash Sen Anupam Basu, Dakshina Ranjan Kisku Tandra Pal Tushar Kanti Bera TCS Mumbai 2,992,000 Sponsored Ongoing 2021-09-01 2023-04-02
2 Neurocomputing and Cognitive Intelligence- Developing a model for Analysing the Learning Disabilities of Dyslexic Child Dr. Bibhash Sen Dr. Suvrojit Das, Prof. Suchismita Roy, Prof. Anupam Basu MeitY, Govt. of India 4,948,000 Sponsored Ongoing 2020-02-28 2023-08-27
3 Design of lightweight and cost-effective PUF-Enabled secure architecture for authentication Dr. Bibhash Sen Prof. Suchismita Roy Department of Science & Technology Government of West Bengal 799,000 Sponsored Completed 2019-09-16 2022-08-15
4 Secure Architecture for FPGA based IoT Applications with enhanced physical unclonable function Dr. Bibhash Sen Prof. Suchismita Roy DST-SERB (Core Research/ EMR scheme) 1,674,550 Sponsored Completed 2018-08-21 2023-03-10
5 ADKit: Smartphone Based Artificial Intelligence Enabled Portable Low-cost Anemia Detection Kit based on Observation of Nail and Palm Pallor Dr. Mamata Dalui Dr. Bibhash Sen MeitY Sponsored Completed 2018
6 Modernization of VLSI Laboratory (Infrastructure) Prof. Suchismita Roy (Coordinator) Dr. Bibhash Sen (Co-coordinator) DST-FIST, Govt. of India Sponsored Completed
7 A Study on Hardware Security and its Challenges Dr. Bibhash Sen n/a RIG-III, NIT Durgapur 1,000,000 Sponsored Completed

Projects

Sl.No. Title Name of the PI Name of the CoPIs Funding Agency Amount (Rs.) Project Type Project Status Date of Initiation Date of Completion
1 Cognitive load assessment methods for the blind, in adaptation to new assistive technologies Bibhash Sen Anupam Basu, Dakshina Ranjan Kisku Tandra Pal Tushar Kanti Bera TCS Mumbai 2,992,000 Sponsored Ongoing 2021-09-01 2023-04-02
2 Neurocomputing and Cognitive Intelligence- Developing a model for Analysing the Learning Disabilities of Dyslexic Child Dr. Bibhash Sen Dr. Suvrojit Das, Prof. Suchismita Roy, Prof. Anupam Basu MeitY, Govt. of India 4,948,000 Sponsored Ongoing 2020-02-28 2023-08-27
3 Design of lightweight and cost-effective PUF-Enabled secure architecture for authentication Dr. Bibhash Sen Prof. Suchismita Roy Department of Science & Technology Government of West Bengal 799,000 Sponsored Completed 2019-09-16 2022-08-15
4 Secure Architecture for FPGA based IoT Applications with enhanced physical unclonable function Dr. Bibhash Sen Prof. Suchismita Roy DST-SERB (Core Research/ EMR scheme) 1,674,550 Sponsored Completed 2018-08-21 2023-03-10
5 ADKit: Smartphone Based Artificial Intelligence Enabled Portable Low-cost Anemia Detection Kit based on Observation of Nail and Palm Pallor Dr. Mamata Dalui Dr. Bibhash Sen MeitY Sponsored Completed 2018
6 Modernization of VLSI Laboratory (Infrastructure) Prof. Suchismita Roy (Coordinator) Dr. Bibhash Sen (Co-coordinator) DST-FIST, Govt. of India Sponsored Completed
7 A Study on Hardware Security and its Challenges Dr. Bibhash Sen n/a RIG-III, NIT Durgapur 1,000,000 Sponsored Completed

Projects

Sl.No. Title Name of the PI Name of the CoPIs Funding Agency Amount (Rs.) Project Type Project Status Date of Initiation Date of Completion
Indexing

22

Google Scholar h-index

43

Google Scholar i10-index

17

Scopus h-index

Journals

ID Details Year
2024 1. CAPUF: Design of a configurable circular arbiter PUF with enhanced security and hardware efficiency Mahabub Hasan Mahalat, Shyam Subba, Anindan Mondal, Biplab K. Sikdar, Rajat Subhra Chakraborty, Bibhash Sen Integration, the VLSI Journal 95 (2024) 102113 SCIE https://doi.org/10.1016/j.vlsi.2023.102113 Elsevier https://www.sciencedirect.com/science/article/pii/S0167926023001554 2024
2023 2. Secure and Lightweight Authentication Protocol Using PUF for the IoT-based Wireless Sensor Network Sourav Roy, Dipnarayan Das, and Bibhash Sen ACM Journal on Emerging Technologies in Computing Systems Volume 20 (1) pp: 1 - 17 SCIE https://doi.org/10.1145/3624477 ACM https://dl.acm.org/doi/full/10.1145/3624477 2023
2023 3. PLAKE: PUF-Based Secure Lightweight Authentication and Key Exchange Protocol for IoT Sourav Roy, Dipnarayan Das, Anindan Mondal, Mahabub Hasan Mahalat , Bibhash Sen, Biplab Sikdar IEEE Internet of Things Journal Volume: 10, Issue: 10 SCI 10.1109/JIOT.2022.3202265 IEEE https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=9868840 2023
2023 4. Towards the Generation of Test vectors for the Detection of Hardware Trojan Targeting Effective Switching Activity A. Mondal, D. Kalita, A. Ghosh, S. Roy and B. Sen ACM Journal on Emerging Technologies in Computing Systems Others https://doi.org/10.1145/3597497 2023
2023 5. Hardware Trojan Detection using Transition Probability with Minimal Test Vectors A. Mondal, S. Karmakar, M. H. Mahalat, S. Roy, B. Sen and A. Chattopadhyay ACM Transactions on Embedded Computing Systems Volume 22 Issue 1 Article No.: 11 pp 1–21 Others https://doi.org/10.1145/3545000 2023
2023 6. Cost-effective synthesis of QCA logic circuit using genetic algorithm Amit Kumar Pramanik, Mahabub Hasan Mahalat, Jayanta Pal, Seyed-Sajad Ahmadpour, Bibhash Sen The Journal of Supercomputing 79(4),3850-3877 SCI http://dx.doi.org/10.1007/s11227-022-04757-0 2023
2023 7. A new design of parity preserving reversible Vedic multiplier targeting emerging quantum circuits Mojtaba Noorallahzadeh, Mohammad Mosleh, Seyed‐Sajad Ahmadpour, Jayanta Pal, Bibhash Sen International Journal of Numerical Modelling: Electronic Networks, Devices and Fields 3089 SCI https://doi.org/10.1002/jnm.3089 2023
2023 8. Smartphone – based Non-invasive Haemoglobin Level Estimation by Analyzing Nail Pallor Abhishek Kesarwani, Sunanda Das, Mamata Dalui, Dakshina Ranjan Kisku, Suchismita Roy, Anupam Basu, Bibhash Sen Biomedical Signal Processing and Control SCI https://doi.org/10.1016/j.bspc.2023.104959 2023
2023 9. Non-invasive anaemia detection by examining palm pallor: A smartphone-based approach Abhishek Kesarwani, Sunanda Das, Mamata Dalui, Dakshina Ranjan Kisku, Suchismita Roy, Anupam Basu, Bibhash Sen Biomedical Signal Processing and Control 104045 SCI https://doi.org/10.1016/j.bspc.2022.104045 2023
2023 10. Cost-efficient method for inverter reduction and proper placement in quantum-dot cellular automata Amit Kumar Pramanik, Jayanta Pal, Kumar Mohit, Mrinal Goswami, Bibhash Sen International Journal of Electronics 1-34 SCI https://doi.org/10.1080/00207217.2022.2145503 2023
2022 11. Regular clocking-based Automated Cell Placement technique in QCA targeting sequential circuit D Bhowmik, AK Pramanik, J Pal, P Sen, AR Singh, AK Saha, B Sen Computers & Electrical Engineering  98, 107668 Others 10.1016/j.compeleceng.2021.107668 2022
2022 12. Towards the realization of regular clocking-based QCA circuits using genetic algorithm AK Pramanik, D Bhowmik, J Pal, P Sen, AK Saha, B Sen Computers & Electrical Engineering  97, 107640 Others 2022
2021 13. Implementation, Characterization and Application of Path Changing Switch based Arbiter PUF on FPGA as a lightweight Security Primitive for IoT MH Mahalat, S Mandal, A Mondal, B Sen, RS Chakraborty ACM Transactions on Design Automation of Electronic Systems (TODAES) SCI 2021
2021 14. PUF based Secure and Lightweight Authentication and Key-Sharing Scheme for Wireless Sensor Network MH Mahalat, D Karmakar, A Mondal, B Sen ACM Journal on Emerging Technologies in Computing Systems (JETC) 18 (1), 1-23 SCI 2021
2021 15. Regular Clocking based Emerging Technique in QCA Targeting Low Power Nano Circuit J Pal, AK Pramanik, M Goswami, AK Saha, B Sen International Journal of Electronics 1-23 Others 10.1080/00207217.2021.1972473 2021
2021 16. CFA: Toward the Realization of Conservative Full Adder in QCA with Enhanced Reliability J Pal, M Goswami, AK Saha, B Sen Journal of Circuits, Systems and Computers  30 (10), 2150172 Others 2021
2021 17. Configurable memory designs in quantum-dot cellular automata M Goswami, R Tanwar, P Rawat, B Sen International Journal of Information Technology  13 (4), 1381-1393 Others 2021
2021 18. Hardware Trojan Free Netlist Identification: A Clustering Approach A Mondal, RK Biswal, MH Mahalat, S Roy, B Sen Journal of Electronic Testing  37 (3), 317-328 Others 10.1007/s10836-021-05953-1 2021
2021 19. An efficient, scalable, regular clocking scheme based on quantum-dot cellular automata J Pal, AK Pramanik, JS Sharma, AK Saha, B Sen Analog Integrated Circuits and Signal Processing  107 (3), 659-670 Others 10.1080/21681724.2019.1570551 2021
2021 20. Systematic cell placement in quantum‐dot cellular automata embedding underlying regular clocking circuit D Bhowmik, J Pal, M Goswami, P Sen, AK Saha, B Sen IET Circuits, Devices & Systems Others https://doi.org/10.1049/cds2.12015 2021
2021 21. PUF based Lightweight Authentication and Key Exchange Protocol for IoT S Roy, D Das, A Mondal, MH Mahalat, S Roy, B Sen Department of Computer Science and Engineering, National Institute of Technology Durgapur, Durgapur, WB, India pages 698-703 Others DOI: 10.5220/0010550906980703 2021
2021 22. Synthesis of composite logic gate in QCA embedding underlying regular clocking Jayanta Pal, Dhrubajyoti Bhowmik, Ayush Ranjan Singh, Apu Kumar Saha, Bibhash Sen Facta Universitatis-series: Electronics and Energetics  34 (1), 115-131 Others https://doi.org/10.2298/FUEE2101115P 2021
2021 23. Regular clocking scheme based design of cost-efficient comparator in QCA J Pal, M Noorallahzadeh, JS Sharma, D Bhowmik, AK Saha, B Sen Indonesian Journal of Electrical Engineering and Computer Science 21 (1), 44-55 Others http://doi.org/10.11591/ijeecs.v21.i1.pp44-55 2021
2021 24. PUF based Secure and Lightweight Authentication and Key-Sharing Scheme for Wireless Sensor Network M. H. Mahalat, D Karmakar, A. Mondal and B. Sen ACM Journal on Emerging Technologies in Computing Systems (JETC) SCI 2021
2020 25. Regular Clocking Scheme based Design of Cost-efficient Comparator in QCA J. Pal, D. Bhowmik, M. Noorallahzadeh, J. Sil Sharma, Apu K. Saha & Bibhash Sen Indonesian Journal of Electrical Engineering and Computer Science (IJEECS), (2021) 21(1), 44-55 SCOPUS DOI: 10.11591/ijeecs.v21.i1.pp44-55, 2020 2020
2020 26. Design of fault tolerant majority voter for error resilient TMR targeting micro to nano scale logic M. Goswami, S. Chattopadhyay, Shiv B. Tripathi, Bibhash Sen International Journal of Computational Science and Engineering (JCSE) , Inderscience, 2020. 21 (3), 375-393 SCOPUS DOI: 10.1504/IJCSE.2020.106062 2020
2020 27. An efficient clocking scheme for quantum-dot cellular automata M. Goswami, A. Mondal, Mahabub H. Mahalat, Bibhash Sen, Biplab K. Sikdar International Journal of Electronics Letters (JEL), , 2020. 8 (1), 83-96, Taylor & Francis SCOPUS https://doi.org/10.1080/21681724.2019.1570551 2020
2020 28. Synthesis of Composite Logic Gate in QCA Embedding Underlying Regular Clocking J. Pal, D. Bhowmik, Ayush R. Singh, Apu K. Saha & Bibhash Sen Facta Universitatis, Series: Electronics and Energetics, 2020 ESCI DOI No. https://doi.org/10.2298/FUEE2101115P 2020
2020 29. An Efficient, Scalable, Regular Clocking Scheme based on Quantum dot Cellular Automata J. Pal, Amit K. Pramanik, J. Sil Sharma, Apu K. Saha & Bibhash Sen Analog Integrated Circuits and Signal Processing (AICSP) SCIE DOI: 10.1007/s10470-020-01760-4 2020
2020 30. PUF: a new era in IoT security Bibhash Sen CSI Transactions on ICT Volume 8, issue 2, June 2020, pp. 185–191 Others https://doi.org/10.1007/s40012-020-00293-5. 2020 2020
2020 31. Systematic Cell placement in Quantum-dot Cellular Automata Embedding Underlying Regular Clocking Circuit D. Bhowmik, J. Pal, P. Sen, M. Goswami, Apu K. Saha & Bibhash Sen IET Circuits, Devices & Systems (CDS), IET 2020 SCIE DOI: 10.1049/cds2.12015 2020
2020 32. In memory computation using quantum-dot cellular automata M. Goswami, J. Pal, MR Choudhury, PP Chougule, Bibhash Sen IET Computers & Digital Techniques (CDT) 14 (6), 336-343, IET 2020 SCIE DOI: 10.1049/iet-cdt.2020.0008 2020
2020 33. CFA: Towards the Realization of Conservative Full Adder in QCA with Enhanced Reliability J. Pal, M. Goswami, Apu K. Saha, Bibhash Sen Journal of Circuits, Systems and Computers (JCSC), World Scientific Publishers SCIE doi = {10.1142/S0218126621501723} 2020
2019 34. Application Dependent Testing of FPGA Interconnect Network S Banik, S Roy and B Sen IEEE Transactions on Very Large-Scale Integration Systems (TVLSI) 27 (10), pp. 2296 – 2304 Others doi: 10.1109/TVLSI.2019.2925932 2019
2019 35. An Efficient Inverter Logic in Quantum-Dot Cellular Automata for Emerging Nanocircuits M Goswami, M Roychoudhury, J Sarkar, B Sen, BK Sikdar Arabian Journal for Science and Engineering (AJSE), Springer, 2019. 35 (5), 729-740 SCIE 2019
2019 36. Design of Fault Tolerant Majority Voter for Error Resilient TMR Targeting Micro to Nano Scale Logic M Goswami, S Chattopadhyay, SB Tripathi, B Sen Journal of Computational Science and Engineering SCOPUS 2019
2018 37. An Integrated Framework for Application Independent Testing of FPGA Interconnect Shukla Banik , Suchismita Roy ,Bibhash Sen Journal of Electronic Testing Online ISSN : 1573-0727 SCIE https://doi.org/10.1007/s10836-019-05827-7 Springer 2018
2018 38. Application-Dependent Testing of FPGA Interconnect Network Shukla Banik , Suchismita Roy ,Bibhash Sen IEEE Transactions on Very Large Scale Integration (VLSI) Systems Page(s): 2296 - 2304 Others 10.1109/TVLSI.2019.2925932 IEEE 2018
2018 39. An Efficient Inverter Logic in Quantam dot cellular automata for emerging nanocircuits Mrinal Goswami, Mayukh Roychoudhury,Joydeb Sarkar,Bibhash Sen,Biplab K. Sikdar Arabian Journal for Science and Engineering Online ISSN : 2191-4281 SCIE https://doi.org/10.1007/s13369-019-04103-2 Springer 2018
2017 40. Design of Testable Adder in Quantum-dot Cellular Automata with Fault Secure Logic Mrinal Goswami, Bibhash Sen, Rijoy Mukherjee, Biplab K Sikdar Microelectronics Journal Volume 60, February 2017, Pages 1–12 SCIE http://dx.doi.org/10.1016/ j.mejo.2016. 11.008 ELSEVIER 2017
2017 41. A Processing in Memory Realization Using Quantum Dot Cellular Automata (QCA):Proposal and Implementation P.P. Chougule, Bibhash Sen, R. Mukherjee, P.S. Patil, R.K. Kamat, T.D. Dongale JOURNAL OF NANO- AND ELECTRONIC PHYSICS Vol. 9 No 1, 01021(5pp) ESCI 10.21272/jnep.9(1).01021 Sumy State University (Sumy, Ukraine) 2017
2017 42. Novel Conservative Reversible Error Control Circuits Based On Molecular-QCA Neeraj Kumar Misra, Bibhash Sen, Subodh Wairya International Journal of Computer Applications in Technology, Inderscience Publishers (Switzerland) vol. 56, no. 1 SCOPUS 10.1504/IJCAT.2017.10007443 Inderscience Publishers (Switzerland) 2017
2017 43. Design of Conservative, Reversible Sequential Logic for Cost Efficient Emerging Nano Circuits with Enhanced Testability Neeraj Kumar Misra, Subodh Wairya, Bibhash Sen Ain Shams Engineering Journal, (Amsterdam, Netherlands) vol. 9 page. 2027-2037 SCIE 10.1016/j.asej.2017.02.005 ELSEVIER 2017
2017 44. Towards Designing Efficient Reversible Binary Code Converter and a Dual Rail Checker For Emerging Nano Circuit Neeraj Kumar Misra, Bibhash Sen, Subodh Wairya Journal of Computational Electronics, (New York, USA) Volume 16, Issue 2, pp 442–458 SCIE 10.1007/s10825-017-0960-4 Springer 2017
2017 45. Reliability-aware Design for Programmable QCA Logic with Scalable Clocking Circuit Bibhash Sen, Mayukh R Chowdhury, Rijoy Mukherjee, Mrinal Goswami and Biplab K Sikdar Journal of Computational Electronics Volume 16, Issue 2, pp 473–485 SCIE 10.1080/00207217.2017.12931 Springer 2017
2017 46. Realization of Processing In-memory Computing Architecture using Quantum Dot Cellular Automata P.P.Chougule, Bibhash Sen, T.D. Dongale Microprocessors and Microsystems Volume 52, Pages 49-58 SCIE 10.1016/j.micpro.2017.04.022 ELSEVIER 2017
2017 47. Testable Novel Parity Preserving Reversible Gate And Low Cost Quantum Decoder Design In 1-D Molecular-QCA Neeraj Kumar Misra, Bibhash Sen, Subodh Wairya, Bandan Boi Journal of Circuits, System and Computers (Singapore) 26 pages, vol. 26, no. 9 SCIE 10.1142/S0218126617501456 WORLD SCIENTIFIC 2017
2017 48. Design of Reliable Universal QCA Logic in the Presence of Cell Deposition Defect Bibhash Sen, Rijoy Mukherjee, Kumar Mohit and Biplab K. Sikdar, International Journal of Electronics, 104:8, 1285-1297 SCIE DOI: 10.1080/00207217.2017.1293174 Taylor & Francis 2017
2016 49. Optimal synthesis of QCA logic circuit eliminating wire-crossings   Rajdeep Kumar Nath, Bibhash Sen, Biplab K. Sikdar IET Circuits, Devices & Systems Volume: 11 , Issue: 3 SCIE 10.1049/iet-cds.2016.0252 IET 2016
2016 50. On the Reliability of Majority Logic in Qunatum-dot Cellular Automata B. Sen, Y. Sahu, R. Mukherjee, R. K Nath and B. K. Sikdar Microelectronics Journal Pages7-18, ISSN0026-2692 SCIE http://dx.doi.org/10.1016/ j.mejo.2015.11.002 ELSEVIER 2016
2016 51. Designing Conservative Reversible N-Bit Binary Comparator For Emerging Quantum-Dot Cellular Automata Nano Circuits Neeraj Kumar Misra, Bibhash Sen, Subodh Wairya, Journal of Nanoengineering and Nonmanufacturing, 16 pages, vol. 6, pp. 1-16 Others doi:10.1166/jnan.2016.1286 American Scientific Publisher (Valencia, California, USA) 2016
2015 52. Towards the design of hybrid qca tiles targeting high fault tolerance B. Sen, M. Dutta, R. Mukherjee, R. Nath, A. Sinha, and B. Sikdar Journal of Computational Electronics pp. 1–17, 2015 SCIE http://dx.doi.org/10.1007/s10825-015-0760-7 Springer 2015
2015 53. Towards Modular Design of Reliable QCA Logic Circuit using Multiplexer Bibhash Sen, Mrinal Goswami, Subhra Mazumdar and Biplab k Sikdar Computers and Electrical Engineering Journal, Elsevier Vol 45, pages 42-54 SCIE 10.1016/j.compeleceng.2015.05.001 ELSEVIER 2015
2015 54. Towards the hierarchical design of multilayer QCA logic circuit B. Sen, A. Nag, A. Dey and B. K. Sikdar Journal of Computational Science issn:1877-7503 SCIE http://dx.doi.org/10.1016/j.jocs.2015.09.010 ELSEVIER 2015
2014 55. Efficient design of parity preserving logic in quantum-dot cellular automata targeting enhanced scalability in testing Bibhash Sen, Manojit Dutta and Biplab k Sikdar Microelectronics Journal 10 pages, vol 45, No 2 SCIE http://dx.doi.org/ 10.1016/ j.mejo. 2013.11.008 ELSEVIER 2014
2014 56. Realizing Reversible Computing in QCA Framework Resulting in Efficient Design of Testable ALU Bibhash Sen, Manojit Dutta, Samik Some, and Biplab K. Sikdar ACM J. Emerg. Technol. Comput. Syst (JETC) Vol 11, No. 3, Article 30, 22 pages SCIE http://doi.acm.org/10.1145/262953 ACM 2014
2014 57. Modular Design of testable reversible ALU by QCA multiplexer with increase in programmability Bibhash Sen, Manojit Dutta, Mrinal Goswami and Biplab k Sikdar Microelectronics Journal 10 pages, vol 45, No 11 SCIE http://dx.doi.org/10.1016/j.mejo ELSEVIER 2014
2013 58. Reversible Logic-Based Fault-Tolerant Nanocircuits in QCA Bibhash Sen, Siddhant Ganeriwal, and Biplab K. Sikdar ISRN Electronics, Hindawi Volume 2013 (2013), Article ID 850267, 9 pages, Others http://dx.doi.org/10.1155/2013/850267. Hindawi 2013
2013 59. Design of Efficient Full Adder in Quantum-Dot Cellular Automata Bibhash Sen, Ayush Rajoria and Biplab k Sikdar The Scientific World Journal, Hindawi Volume 2013 (2013), Article ID 250802, 10 pages SCOPUS http://dx.doi.org/10.1155/2013/250802 Hindawi Publishing Corporation 2013

Conferences

ID Details Year
2023 1.Amit Kumar Pramanik, Sudipta Debnath, Jayanta Pal, Bibhash Sen "Design and Analysis of Regular Clock based 2:4 Decoder using T-Gate in QCA" Asian Symposium on Cellular Automata Technology (ASCAT) Online Conference 2023
2022 2.Sourav Roy, Abir Maji, Mahabub Hasan Mahalat, Bibhash Sen "PUF based Authentication and Key Sharing Protocol for Smart Water Monitoring System" TENSYMP2022 IIT BOMBAY 2022
2022 3.A.K. Pramanik, J. Pal, B. K. Sikdar and B. Sen "Performance Analysis of Regular Clocking based Quantum-dot Cellular Automata Logic Circuit: Fault Tolerant approach" 15th International Conference and School “Cellular Automata for Research and Industry” ACRI- 2022. University of Geneva, Switzerland.  September  12-15, 2022, Springer.  University of Geneva, Switzerland 2022
2022 4.D.Das, S.Roy, M.H.Mahalat and B.Sen "A Novel Cross-Platform Physically Unclonable Function for Emerging FPGA-based IoT Devices" 2022 Asian Hardware Oriented Security and Trust Symposium (AsianHOST) Singapore 2022
2021 5.A. Mondal, R.K. Biswal, M.H. Mahalat, S. Roy and B. Sen "Hardware Trojan Free Netlist Identification: A Clustering Approach" J Electron Test Online Conference 2021
2021 6.Sourav Roy , Dipnarayan Das , Anindan Mondal , Mahabub Hasan Mahalat , Suchismita Roy and Bibhash Sen., "PUF based Lightweight Authentication and Key Exchange Protocol for IoT", 18th International Conference on Security and Cryptography (SECRYPT 2021) Online Conference 2021
2019 7.M. Goswami, M.R. Choudhury, B. Sen, "A Realistic Configurable Level Triggered Flip-Flop in Quantum-Dot Cellular Automata", International Symposium on VLSI Design and Test, vol 1066, https://doi.org/10.1007/978-981-32-9767-8_38, Springer, Singapore Singapore 2019
2019 8.Mrinal Goswami, Govind Raj, Aron Narzary and Bibhash Sen, "A Methodology to Design Online Testable Reversible Circuits" 22nd International Symposium on VLSI Design and Test (VDAT-2018), https://doi.org/10.1007/978-981-13-5950-7_28, Thiagarajar College of Engineering, Madurai, Chennai Thiagarajar College of Engineering, Madurai, Chennai 2019
2019 9.S. Banik, S. Roy and B. Sen "Test Configuration Generation for Different FPGA Architectures for Application Independent Testing" 32nd International Conference on VLSI Design and 2019 18th International Conference on Embedded Systems (VLSID), pp. 395-400, doi: 10.1109/VLSID.2019.00086, Delhi, NCR, India Delhi, NCR, India 2019
2019 10.M. H. Mahalat, S. Mandal, A. Mondal and B. Sen "An Efficient Implementation of Arbiter PUF on FPGA for IoT Application" 32nd IEEE International System-on-Chip Conference (SOCC), pp. 324-329, doi: 10.1109/SOCC46988.2019.1570548268, Singapore Singapore 2019
2019 11.A. Mondal, M. H. Mahalat, S. Mandal, S. Roy and B. Sen "A Novel Test Vector Generation Method for Hardware Trojan Detection" 32nd IEEE International System-on-Chip Conference (SOCC), pp. 80-85, doi: 10.1109/SOCC46988.2019.1570548271, Singapore Singapore 2019
2018 12.Shiv Bhusan Tripathi, Aron Narzary, Rahul Toppo, Mrinal Goswami and Bibhahs Sen "Designing Efficient Configurable QCA Nano Circuit for Morphological Operations in Image Processing" is accepted at the 8th Internation Conference on Applied Physics and Mathematics (ICAPM 2018), pages=012028 ,volume= 103, Phuket, Thailand during January 27-29, 2018  Phuket, Thailand 2018
2018 13.Mrinal Goswami, Govind Raj, Aron Narzary and Bibhash Sen “A Methodology to Design Online Testable Reversible Circuits” has been accepted in 22nd International Symposium on VLSI Design and Test (VDAT-2018) at Thiagarajar College of Engineering, Madurai, Chennai.(Accepted Paper) Thiagarajar College of Engineering, Madurai, Chennai 2018
2017 14.Mrinal Goswami, Kumar Mohit and Bibhash Sen “Cost effective realization of XOR logic in QCA” 7th International Symposium on Embedded Computing and System Design (ISED), Pages: 1 – 5, December 2017, DOI: 10.1109/ISED.2017.8303950 NIT Durgapur, West Bengal, India 2017
2017 15.Mrinal Goswami, Aron Narzary, Govind Raj and Bibhash Sen “Design of reversible bidirectional logarithmic barrel shifter” 7th International Symposium on Embedded Computing and System Design (ISED), Pages: 1 – 4, December 2017, DOI: 10.1109/ISED.2017.8303921 NIT Durgapur, West Bengal, India 2017
2017 16.Mahabub Hasan Mahalat,  Mrinal Goswami, Subhranil Mondal, Anindan Mondal & Bibhash Sen, Design of fault tolerant nano circuits in QCA using explicit cell interaction. 36-40. 10.1109/CALCON.2017.8280691, January, Kolkata, 2017 Kolkata 2017
2016 17.B. Sen, R. Mukherjee, Y Sahu, R. k Nath and Biplab k Sikdar, “Towards designing reliable universal QCA architecture in the presence of cell deposition defect”, 29th  International conference of VLSI design, January 4-8, 2016, Kolkata, India. Kolkata 2016
2016 18.B. Sen, R. Mukherjee, Y Sahu, R. k Nath and Biplab k Sikdar, “Towards designing reliable universal QCA architecture in the presence of cell deposition defect”, 29th  International conference of VLSI design, January 4-8, 2016, Kolkata, India. Kolkata 2016
2016 19.Rijoy Mukherjee, Shibbhushan Tripathi, Snehasish Sen and Bibhash Sen, “Characterization and Analysis of Single Electron Fault of QCA Primitives”, International Conference on Microelectronics, Computing and Communication (MicroCom 2016), NIT Durgapur, WB, India, 23-25 Jan, 2016, India. NIT Durgapur 2016
2012 20.Bibhash Sen,  Manojit Dutta, Divyam Saran and B K Sikdar, “An Efficient Multiplexer in Quantum-dot Cellular Automata”, in Proceedings of  VDAT'12, Vol. 7373, Springer (2012) , p. 350-351. 1-4 July, BESUS, shibpur, India, 2012. BESUS, shibpur 2012
2012 21.Bibhash Sen,  Jyotirmoy Das, B K Sikdar, “A DFT Methodology Targeting On-line Testing Of Reversible Circuit”, in Proceedings of  IEEE Conference ICDCS'12, Coimbatore, India, 2012. Coimbatore, India 2012
2011 22.Bibhash Sen, Anshu S Anand, Tanumay Adak and B K Sikdar, “Thresholding using Quantum Dot Cellular Automata”, in Proceedings of  7th IEEE  Conference Innovation'11, Al Ain and Abu Dahbi, UAE, Page(s): 356 – 360, 25th -27th April, 2011. Al Ain and Abu Dahbi 2011
2011 23.Bibhash Sen, Tanumay Adak, Anshu S Anand, and B K Sikdar, “Synthesis of Reversible  Universal QCA Gate Structure for Energy Efficient Digital Design”, in Proceedings of   IEEE  Conference TENCON'11, Page(s): 806 - 810, Bali, Indonesia.   Bali, Indonesia. 2011
2011 24.Bibhash Sen, Divyam Saran, Mousumi Saha and B K Sikdar, “Synthesis Of Reversible Universal Logic Around QCA With Online Testability”, in Proceedings of 2nd IEEE Conference ISED'11, Page(s): 236 - 241 Kochi, India, 2011. Kochi, India 2011
2011 25.Bibhash Sen, Anshu S Anand and B K Sikdar, “Efficient Design Of Memory Based On  Quantum-Dot Cellular Automata”, in Proceedings of   IEEE  Conference TENCON'11, Page(s):768 - 772, Bali, Indonesia. 2011 Bali, Indonesia 2011
2010 26.Bibhash Sen, Manoj Mohapatra, Mamta Dalui and B K Sikdar, “Introducing Universal QCA Logic Gate for Synthesizing Symmetric Functions with Minimum Wire-Crossings”, in Proceedings of ACM ICWET2010, Mumbai, India, Feb 2010. ISBN:978-1-60558-812-4 Mumbai, India 2010
2010 27.Bibhash Sen, Anik Sengupta, Mamta Dalui and B K Sikdar, “Design of Universal Logic Gate Targeting Minimum Wire-Crossings in QCA Logic Circuit”,  in Proceedings of 53rd IEEE International Midwest Symposium on Circuits and Systems MWSCAS’10, August 1st -4th, Seattle, Washington, USA, 2010. PP.13-18.  ISBN:978-1-4244-7771-5 Seattle, Washington, USA 2010
2010 28.Bibhash Sen, Anik Sengupta, Mamta Dalui and B K Sikdar, “Design of Testable Universal Logic Gate For Minimising Wire-Crossing in QCA Circuits”, in Proceedings of  13th IEEE  Euro-micro Conference DSD'10, Lille, France 1st-3rd  sept,2010. ISBN:978-0-7695-4171-6 Lille, France 2010
2010 29.Bibhash Sen, Mamta Dalui and  B K Sikdar, “ tolerant QCA logic design with coupled Majority-Minority Gate”, in Proceedings of 14th IEEE VLSI Design and Test Symposium, July 7-9, Chitkara University, Himachal Pradesh, India, 2010.(VDAT-2010)-doi: 10.1.1.184.7457Fault Chitkara University, Himachal Pradesh, India 2010
2007 30.Bibhash Sen and B K Sikdar, “A Study on Defect Tolerance Tiles Implementing Universal Gate Functions”,  in Proceedings. Of International Conference on Design & Technology of Integrated Systems in Nanoscale Era, 2007. DTIS on 2-5 Sept. 2007 Page(s):13 – 18 Cosponsored by IEEE. ISBN:978-1-4222-1277-8. Morocco 2007
2007 31.Bibhash Sen and B K Sikdar, “Characterization of Universal Nan-Nor-Inverter QCA gate”, in proceedings of 11th IEEE VLSI Design and Test Symposium, Kolkata, August 8-11,2007, pp 433-442. (VDAT-2007) Kolkata 2007

Books

ID Title

Patents

ID Details Patent Filed Year
Awards and Recognitions

1. Sir Visvesvaraya Young Faculty Research Fellowship (YFRF) 2018, Digital Corporation of India (MeitY), Govt. of India.

2. Best Paper award in IEEE ICCAS 2012

3. Star Award for outstanding performance in CTS, 2008-Q1

4. NEC Scholarship in UG 1998-2002.

5. GATE Qualified 2005; PG Scholarship.

6. Cognizant certified Professional in Banking and Financial Services, 1st Jan 2008.

7. Cognizant certified Professional in Core Java (L-0), Feb 2008.

Administrative Responsibilities

1. Webmaster of NIT Durgapur Since 2018.

2. Convenor, Departmental Ph.D. admission, and Coordination Since 2017

3. Convenor, ID card and Prospectus Mgmt Since 2016

4. Convenor, Website subcommittee Since 2018

5. Lab in charge, VLSI lab & Research Lab Since 2010

6. Convenor, Purchase Committee for ‘Embedded System Design’ center Since 2016

7. Faculty Advisor of the students' club  RECursion since February 2016

8. Faculty Advisor of the students' club  Enteract Since 2018

9. Warden HALL-XI (2013-2015)

10. UG Coordinator, CSE Department (2015-2017)

11. Convenor, Departmental Purchase Committee, CSE, NIT Durgapur, 2010 - 2017.

 

Contact

Mobile : +91-9434788161
Email : bibhash.sen@cse.nitdgp.ac.in

Miscellaneous

Invited/Delivered Lectures/Talks as a Resource Person:

1. Acted as Chairman and judge on scientific sessions in the 2nd Regional Science and Technology Congress (RSTC), Western Region, held during November 16-17, 2017 at The University of Burdwan

2. Invited speaker for the 2 days National level workshop on "Low Power Design Using quantum-dot cellular Automata” during 5th January 2018, Pimpri Chinchwad College of Engg. (PCCOE) , Pune.

3. Invited talk on “Software engineering and its application” in TIT, Agartala, 17 April 2018

4. Invited talk delivered in 5 days workshop on “Software Engineering” in SUIIT, Burla, Sambalpur, Odisha, 2017

5. Invited talk deliveered in 5 days workshop (ATAL) on "Quantum Computing" in Tripura University, Agartala, Tripura, 2019.

6. Invited talk deliveered in 5 days workshop (ATAL) on "Quantum Computational Intelligence", 2-14 Nov, 2019 in RCC Institute of Information Technology, Kolkata

7. Invited talk delivered in 5 days workshop on “Recent Trends in Electronics and Information Technology (RTEIT-2020)” in Department of Information Technology and Electronics and Communication Engineering, Tripura University (A Central University), 9-13 November 2020

8. Invited talk delivered in 5 days workshop (AICTE/ATAL) on "Quantum dot Cellular Automata" in Department of Information Technology, Sri Ramakrishna Engineering College, Coimbatore, 24-28 November 2020.

Academic Identity

Orcid Id
https://orcid.org/0000-0003-4803-3074
Scopus Id
https://www.scopus.com/authid/detail.uri?authorId=24484127600
Researcher Id
https://nitdgp.irins.org/profile/48250
Google Scholar Id