Sl.No. | Title | Name of the PI | Name of the CoPIs | Funding Agency | Amount (Rs.) | Project Type | Project Status | Date of Initiation | Date of Completion |
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Sl.No. | Title | Name of the PI | Name of the CoPIs | Funding Agency | Amount (Rs.) | Project Type | Project Status | Date of Initiation | Date of Completion |
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Sl.No. | Title | Name of the PI | Name of the CoPIs | Funding Agency | Amount (Rs.) | Project Type | Project Status | Date of Initiation | Date of Completion |
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ID | Details | Year |
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2021 | 1. Robustness to ambipolarity and improvement to HF FOMs of dual-stacked-gate dielectrics underlap heterojunction TFETs Rajashree Das, Brinda Bhowmick and Srimanta Baishya Indian Journal of Physics Vol. 95 & 1345-1350 SCI | 2021 |
2020 | 2. Impact of trap charge and temperature on DC and Analog/RF performances of hetero structure overlapped PNPN tunnel FET Karabi Baruah, Rajashree Das and Srimanta Baishya Applied Physics A Vol. 126 & 856 SCI | 2020 |
2019 | 3. Analytical modeling of threshold voltage and subthreshold swing in Si/Ge heterojunction FinFET Rajashree Das and Srimanta Baishya Applied Physics A Vol.125 & 682 SCI | 2019 |
2019 | 4. Electrical parameter analysis of gate-extension on source of germanium tri-gate FinFET Rajashree Das and Srimanta Baishya International Journal of Nanoparticles Vol. 11 & 130-139 SCOPUS | 2019 |
2019 | 5. Dual-material gate dual-stacked gate dielectrics gate-source overlap tri-gate germanium FinFET: analysis and application Rajashree Das and Srimanta Baishya Indian J. Phys Vol. 93 & 197–205 SCI | 2019 |
2019 | 6. Analytical modelling of electrical parameters and the analogue performance of cylindrical gate-all-around FinFET Rajashree Das and Srimanta Baishya Pramana-J. Phys. Vol. 92 & 1-10 SCI | 2019 |
2018 | 7. Investigation on effect of Temperature on dual gate material gate/drain underlap Germanium FinFET Rajashree Das and Srimanta Baishya Journal of Nanoelectronics and optoelectronics Vol. 13 & 980-985 SCI | 2018 |
2018 | 8. Analytical model of surface potential and threshold voltage in gate-drain overlap FinFET Rajashree Das and Srimanta Baishya Microelectronics Journal Vol. 75 & 153-159 SCI | 2018 |
2018 | 9. Analysis of GaN nanoscale FinFET for low power circuit applications Rajashree Das and Srimanta Baishya IET Micro & Nano Letters Vol. 13 & 568-571 SCI | 2018 |
2018 | 10. Controlling fixed trap charge effect in FinFET using heterodielectric BOX Rajashree Das and Srimanta Baishya Electronics Letters Vol. 54 & 239-241 SCI | 2018 |
2016 | 11. Tri-gate heterojunction SOI Ge-FinFETs Rajashree Das, Rupam Goswami, and Srimanta Baishya Superlattices and Microstructures Vol. 91 & 51-61 SCI | 2016 |
ID | Details | Year |
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2017 | 1.0 Kalyani, Kolkata | 2017 |
2017 | 2.3 National Tsing Hua University, Hsinchu, Taiwan | 2017 |
2017 | 3.0 Gautam Budha University, Greater Noida | 2017 |
2016 | 4.3 Coimbatore, India | 2016 |
2015 | 5.5 Macao, China | 2015 |
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