VLSI Research Group (VLSIRG)
ABOUT VLSIRG GROUP:
We are working on Analog and VLSI Circuit Design.
FACULTY ASSOCIATED:
Prof. Ashis Kumar Mal,
Prof. Rajat Mahapatra,
Dr. Rajib Kar,
Dr. Hemanta Kumar Mondal,
Dr. Sapana Ranwa
Dr. Rajashree Das
RECENT PUBLICATIONS:
Will be updated Soon
PROJECTS:
-
Prof. Ashis Kumar Mal, Prof. Rajat Mahapatra, "Special Manpower Development Programme-Chip to System (SMPD-C2S), Funded by Ministry of Electronics & Information Technolgy (MeitY), Govt. of India, 2014 - 2021


