VLSI Research Group (VLSIRG)
ABOUT VLSIRG GROUP:
We are working on Analog and VLSI Circuit Design.
FACULTY ASSOCIATED:
Prof. Ashis Kumar Mal,
Prof. Rajat Mahapatra,
Dr. Rajib Kar,
Dr. Hemanta Kumar Mondal,
Dr. Sapana Ranwa
Dr. Rajashree Das
RECENT PUBLICATIONS:
Will be updated Soon
PROJECTS:
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Prof. Ashis Kumar Mal, Prof. Rajat Mahapatra, "Special Manpower Development Programme-Chip to System (SMPD-C2S), Funded by Ministry of Electronics & Information Technolgy (MeitY), Govt. of India, 2014 - 2021
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![](https://lh3.googleusercontent.com/DdJChTCazEXvgfIFx_21lAbQIt8nP6A-TZwCp0PhQZ81rYW7Y5TPjv7BSZpo8kkMophb9Lq9VP2Z1jeOeaLy2ky3roXYWUjk59rgARD8-wile5810CaQIenspweQBw)
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